EQ typical examples -4

31．The “+”mark have no solder mask opening , we would like follow the gerber. (see  Below  photo)

Our suggestion: Follow the gerber

32.“UL+date in wet film bottom-side” was required in your “PCB sepc-060DJE685D.DOC”. Since the PCB are full of copper, we have no appropriate room to add it , so we suggest :

A. UL+date in wet film, and The UL and date date will be tin.

B. Make a bottom film add the UL and DATE CODE in silk-screen.

33.Two square solder pads without solder mask openings on “L1.spl” in gerber.( see  Below  photo ). So we suggest :

A. Follow the Gerber .

B. Add solder mask openings for them.

34.“lead free.5-15um thick”was required in“Specifikation 4307-0051B.pdf”, The tin thickness is out of our produce ability , To smooth the production, we would like to change the tin thickness from 5-15um to 0.75um(min)in surface and 5um(min)in hole.

Our suggestion: Tin thick 0.75um(min) in surface and 5um(min) in hole.

35.“FR4 0.8 mm 1/1 made by ITEQ for the pcb production” was required in your e-mail, we wonder if the FR4 0.80 mm 1/1 is base material or final requirement ?

We would like use 0.7 mm core, 0.5/0.5 including copper, finished copper thickness will be 1OZ,and board finished thickness will be 0.8+/-0.10mm. Please confirm

36.See Q2: In drawing, it marked number of the hole size of 13 mil is “391”,but in drill data the number of the hole size of 13 mil is “393”.

Our suggestion: “393” in drill data is ok .

37.See Q4: We need to confirm the hole size of 0.25mm at position BGA whether need to plug ,If plug the via at position BGA,we will delete both side of the via soldermask opening .

Our suggestion: plug the via at position BGA and delete SM opening both side .

38.See Q3: In NOTES 23,you requirement” control differential impedance to 100 OHMS +/-10% ON ALL EXTERNAL SIGNAL LAYER (TRACE WIDTH=0.004”). but we can’t find 0.004” track on outer layer , there are some 0.005” track marked in white as below fig.1 shown that are found in out layer ,we wonder if 0.005” track should be impedance –controlled .

So we suggest :

1) L1: 5mil/4.5mil differential impedance value: 90 OHMS +/-10% (reference layer is L2)

2) L3 and L4: 4mil single impedance value: 50 OHMS +/-10% (reference layer is L2 and L5)

3) L7 and L8: 8mil single impedance value: 50 OHMS +/-10% (reference layer is L6 and L9)

39.IN notes 1, WE can’t catch the meanings Of “THE BOARD SUPPLIED BY THIS DRAWING SHALL BE TYPE-3.” And we have no “IPC-ML-950C CLASS 2.” On hand .

Our suggestion: ignore it, and follow IPC-6012 class 2 , IPC-A-600F CLASS 2 to build

Please confirm

40.in the following picture, the tolerance for copper thickness was too strict to reach. Shall we ignore it and copper thickness follow PERFAG 3c standard to build